Senior SoC Design & Integration Engineer Santa Clara, CA

Company: Tbwa Chiat/Day Inc
Location: Santa Clara
Posted on: March 19, 2025

Job Description:

Senior SoC Design & Integration EngineerAbout Celestial AIAs Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips. In the era of Accelerated Computing, data center bottlenecks are no longer limited to compute performance, but rather the system's interconnect bandwidth, memory bandwidth, and memory capacity. Celestial AI's Photonic Fabric is the next-generation interconnect technology that delivers a tenfold increase in performance and energy efficiency compared to competing solutions.The Photonic Fabric is available to our customers in multiple technology offerings, including optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB). This allows customers to easily incorporate high bandwidth, low power, and low latency optical interfaces into their AI accelerators and GPUs. The technology is fully compatible with both protocol and physical layers, including standard 2.5D packaging processes. This seamless integration enables XPUs to utilize optical interconnects for both compute-to-compute and compute-to-memory fabrics, achieving bandwidths in the tens of terabits per second with nanosecond latencies.This innovation empowers hyperscalers to enhance the efficiency and cost-effectiveness of AI processing by optimizing the XPUs required for training and inference, while significantly reducing the TCO2 impact. To bolster customer collaborations, Celestial AI is developing a Photonic Fabric ecosystem consisting of tier-1 partnerships that include custom silicon/ASIC design, system integrators, HBM memory, assembly, and packaging suppliers.ABOUT THE ROLEWe are seeking a Senior SoC Design and Integration Engineer to drive the design, integration, and implementation of SoCs, focusing on high-speed interconnects, IP integration, and ASIC execution. This role involves configuring, integrating, and supporting IP verification, including RTL design, synthesis, and working with the physical design team for timing closure.We want to hear from you if you have expertise in SoC integration, high-speed interfaces, AXI interconnects, or ASIC implementation.ESSENTIAL DUTIES AND RESPONSIBILITIESSoC Design, IP Integration & Interconnects:

• Integrate UCIe or similar high-speed IPs into SoC designs.
• Define and configure AXI-based NoCs (Network-on-Chip), interconnects, and subsystem integration.
• Act as a technical liaison between IP vendors, SoC architects, verification, physical design teams, and firmware, driving design reviews and debug efforts to ensure seamless SoC bring-up.
• Run synthesis and design checks related to Lint, CDC, and RDC.
• Optimize RTL integration for power, performance, and area.
• Work with the Physical design team to floor plan, place, perform clock tree synthesis (CTS), and help resolve routing congestion and checks for power integrity.
• Collaborate with verification to support UVM-based testbenches.
• Debug and resolve design, timing, and protocol compliance issues while working closely with verification and firmware teams.
• Work with the post-silicon validation team to bring up SoCs.
• Support emulation and FPGA-based prototyping, ensuring early validation of IP integration.QUALIFICATIONSStrong problem-solving skills with a methodical approach to debugging complex SoC issues are essential for this role. The ideal candidate should be able to collaborate effectively across multiple teams, including IP vendors, ASIC designers, verification engineers, and post-silicon teams, to ensure seamless integration and validation. Excellent written and verbal communication skills are critical for documenting design specifications, leading design reviews, and providing clear debugging reports.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • 10+ years of experience in ASIC/SoC design, integration, and implementation.Technical Expertise:
    • SoC Design & RTL Integration:
    • Experience in RTL design and integration (Verilog/SystemVerilog).
    • Experience working on designs using interconnect protocols like AXI.
    • Experience integrating high-speed interfaces (e.g. UCIe, CXL, PCIe, DDR).
    • Synthesis & ASIC Implementation:
    • Hands-on experience with logic synthesis, static timing analysis (STA), and low-power design techniques.
    • Familiarity with EDA tools for debugging, synthesis, and STA.
    • Knowledge of physical design constraints, floor planning, and timing closure.
    • Experience with formal verification (logical equivalence check) to ensure synthesis correctness.
    • Experience supporting pre-silicon verification (UVM, assertion-based verification, closing functional/code coverage).
    • Knowledge of post-silicon bring-up, validation, and debug techniques.
    • Programming & Scripting:
    • Proficiency in Tcl/Python for automation and debug.PREFERRED QUALIFICATIONS
      • Experience working with UCIe/CXL/PCIe/Serdes would be a plus for this role.As an early-stage startup, we offer an attractive total compensation package inclusive of competitive base salary, bonus, and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $185,000.00 - $225,000.00. The base salary offered may vary based on the final scope determined by the depth of the experience and skills demonstrated by the candidate in the interviews.We offer great benefits (health, vision, dental, and life insurance), a collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high-performance computing.Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.
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Keywords: Tbwa Chiat/Day Inc, Santa Clara , Senior SoC Design & Integration Engineer Santa Clara, CA, Engineering , Santa Clara, California