RTL Design Engineer- Onsite

Company: Viva USA Inc.
Location: Santa Clara
Posted on: February 13, 2025

Job Description:

Title: RTL Design Engineer - Onsite

Find out exactly what skills, experience, and qualifications you will need to succeed in this role before applying below.


















Description:











JOB DUTIES:

Responsible for RTL design using Verilog HDL for implementation and debug.
Read and comprehend System on Chip level architectural specification.
Write microarchitecture specification for new and modified functions.
Responsible for linting and simulation of design.
Work with synthesis and backend teams for physical implementation.

KEY RESPONSIBILITIES:

Perform RTL design of digital components in Verilog/SystemVerilog.
Analyze/fix Lint and CDC errors of the components.
Guarantee quality/timely deliverables meeting project's schedule.
Help to improve/automate design process.

EXPERIENCE:

7-15 years' relevant experience
Experience with RTL design integration tasks
Multi-clock domain designs.
Design constraints for synthesis and static timing analysis.
Knowledge of front-end RTL design tools and methodologies.
Knowledge of scripting languages?like?Perl, TCL or C SHELL

Essential skills:

SOC Design integration tasks such as (RTL integration, Simulation, Debug, Synthesis, STA Constraints, scripting/automation)
Creating technical documentations such as Microarchitecture documentation, Integration guides

Nice-to-haves:

High speed serial interfaces (such as PCIe, CXL etc.)
Experience with of AXI protocol
UPF

EDUCATION:

Bachelor's (required) or Master's in Computer Engineering


















Mandatory skills:










Perl, TCL, C SHELL,
RTL design integration tasks,
Multi-clock domain designs,
Design constraints, synthesis, static timing analysis,
front-end RTL design tools, front-end RTL design methodologies,
SOC Design integration, RTL integration, Simulation, Debug, Synthesis, STA Constraints, scripting, automation,
Creating technical documentations, Microarchitecture documentation, Integration guides,
RTL design, Verilog HDL, microarchitecture specification, Verilog, SystemVerilog,
Analyze, fix Lint, CDC errors









VIVA USA is an equal opportunity employer and is committed to maintaining a professional working environment that is free from discrimination and unlawful harassment. The Management, contractors, and staff of VIVA USA shall respect others without regard to race, sex, religion, age, color, creed, national or ethnic origin, physical, mental or sensory disability, marital status, sexual orientation, or status as a Vietnam-era, recently separated veteran, Active war time or campaign badge veteran, Armed forces service medal veteran, or disabled veteran. Please contact us at hr@viva-it.com for any complaints, comments and suggestions.





Contact Details :

Account co-ordinator: Godwin D Antony Raj, Phone No: (847) 607-1014, Email id: staffing10@viva-it.com



VIVA USA INC.
3601 Algonquin Road, Suite 425
Rolling Meadows, IL 60008
staffing10@viva-it.com - http://www.viva-it.com

Keywords: Viva USA Inc., Santa Clara , RTL Design Engineer- Onsite, Engineering , Santa Clara, California